HD64F3039F18 Datasheet, PDF (115/710 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8 Family / H8/300H Series

Section 5 Interrupt Controller
Interrupt Priority Register B (IPRB)
IPRB is an 8-bit readable/writable register in which interrupt priority levels can be set.
Bit
Initial value
Read/Write
7
6
5
IPRB7 IPRB6 —
0
0
0
R/W
R/W R/W
4
3
2
1
0
— IPRB3 IPRB2 IPRB1 —
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
Reserved bit
Priority level B1
Selects the priority level
of A/D converter
interrupt request
Priority level B2
Selects the priority level of SCI
channel 1 interrupt requests
Priority level B3
Selects the priority level of SCI
channel 0 interrupt requests
Reserved bits
Priority level B6
Selects the priority level of ITU channel 4 interrupt requests
Priority level B7
Selects the priority level of ITU channel 3 interrupt requests
IPRB is initialized to H'00 by a reset and in hardware standby mode.
Rev.3.00 Mar. 26, 2007 Page 91 of 682
REJ09B0353-0300