HD64F3039F18 Datasheet, PDF (230/710 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8 Family / H8/300H Series

Section 8 16-Bit Integrated Timer Unit (ITU)
8.2.2 Timer Synchro Register (TSNC)
TSNC is an 8-bit readable/writable register that selects whether channels 0 to 4 operate
independently or synchronously. Channels are synchronized by setting the corresponding bits to 1.
Bit
Initial value
Read/Write
7
6
5
—
—
—
1
1
1
—
—
—
Reserved bits
4
SYNC4
0
R/W
3
SYNC3
0
R/W
2
SYNC2
0
R/W
1
0
SYNC1 SYNC0
0
0
R/W R/W
Timer sync 4 to 0
These bits synchronize
channels 4 to 0
TSNC is initialized to H'E0 by a reset and in standby mode.
Bits 7 to 5—Reserved: These bits cannot be modified and are always read as 1.
Bit 4—Timer Sync 4 (SYNC4): Selects whether channel 4 operates independently or
synchronously.
Bit 4
SYNC4
0
1
Description
Channel 4's timer counter (TCNT4) operates independently TCNT4 is preset and
cleared independently of other channels
(Initial value)
Channel 4 operates synchronously
TCNT4 can be synchronously preset and cleared
Bit 3—Timer Sync 3 (SYNC3): Selects whether channel 3 operates independently or
synchronously.
Bit 3
SYNC3
0
1
Description
Channel 3's timer counter (TCNT3) operates independently TCNT3 is preset and
cleared independently of other channels
(Initial value)
Channel 3 operates synchronously
TCNT3 can be synchronously preset and cleared
Rev.3.00 Mar. 26, 2007 Page 206 of 682
REJ09B0353-0300