HD64F3039F18 Datasheet, PDF (178/710 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8 Family / H8/300H Series

Section 7 I/O Ports
Port 5 Data Register (P5DR)
P5DR is an 8-bit readable/writable register that stores data for pins P5₃ to P5₀.
Bit
7
6
5
4
3
2
1
0
—
—
—
—
P5 ₃
P5 ₂
P5 ₁
P5 ₀
Initial value
1
1
1
1
0
0
0
0
Read/Write
—
—
—
—
R/W
R/W
R/W R/W
Reserved bits
Port 5 data 3 to 0
These bits store data
for port 5 pins
When a bit in P5DDR is set to 1, if port 5 is read the value of the corresponding P5DR bit is
returned directly, regardless of the actual state of the pin. When a bit in P5DDR is cleared to 0, if
port 5 is read the corresponding pin level is read.
Bits P5₇ to P5₄ are reserved. They cannot be modified and are always read as 1.
P5DR is initialized to H'F0 by a reset and in hardware standby mode. In software standby mode it
retains its previous setting.
Port 5 Input Pull-Up Control Register (P5PCR)
P5PCR is an 8-bit readable/writable register that controls the MOS input pull-up transistors in port
5.
Bit
7
6
5
4
3
2
1
0
—
—
—
— P5₃PCR P5₂PCR P5₁PCR P5₀PCR
Initial value
1
1
1
1
0
0
0
0
Read/Write
—
—
—
—
R/W R/W R/W R/W
Reserved bits
Port 5 input pull-up control 3 to 0
These bits control input pull-up
transistors built into port 5
When a P5DDR bit is cleared to 0 (selecting generic input) in modes 5 to 7, if the corresponding
bit from P5₃PCR to P5₀PCR is set to 1, the input pull-up transistor is turned on.
P5PCR is initialized to H'F0 by a reset and in hardware standby mode. In software standby mode
it retains its previous setting.
Rev.3.00 Mar. 26, 2007 Page 154 of 682
REJ09B0353-0300