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HD64F3039F18 Datasheet, PDF (52/710 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8 Family / H8/300H Series
Section 2 CPU
2.6 Instruction Set
2.6.1 Instruction Set Overview
The H8/300H CPU has 62 types of instructions, which are classified as shown in table 2.1.
Table 2.1 Instruction Classification
Function
Instruction
Types
Data transfer
MOV, PUSH*1, POP*1, MOVTPE*2, MOVFPE*2
3
Arithmetic operations ADD, SUB, ADDX, SUBX, INC, DEC, ADDS, SUBS, DAA, DAS, 18
MULXU, MULXS, DIVXU, DIVXS, CMP, NEG, EXTS, EXTU
Logic operations
AND, OR, XOR, NOT
4
Shift operations
SHAL, SHAR, SHLL, SHLR, ROTL, ROTR, ROTXL, ROTXR
8
Bit manipulation
BSET, BCLR, BNOT, BTST, BAND, BIAND, BOR, BIOR, BXOR, 14
BIXOR, BLD, BILD, BST, BIST
Branch
Bcc*3, JMP, BSR, JSR, RTS
5
System control
TRAPA, RTE, SLEEP, LDC, STC, ANDC, ORC, XORC, NOP
9
Block data transfer EEPMOV
1
Notes: 1. POP.W Rn is identical to MOV.W @SP+, Rn.
PUSH.W Rn is identical to MOV.W Rn, @–SP.
POP.L ERn is identical to MOV.L @SP+, Rn.
PUSH.L ERn is identical to MOV.L Rn, @–SP.
2. These instructions are not available on the H8/3039 Group.
3. Bcc is a generic branching instruction.
Total 62 types
Rev.3.00 Mar. 26, 2007 Page 28 of 682
REJ09B0353-0300