HD64F3039F18 Datasheet, PDF (357/710 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8 Family / H8/300H Series

11.1.2 Block Diagram
Figure 11.1 shows a block diagram of the SCI.
Section 11 Serial Communication Interface
Module data bus
Internal
data bus
RxD
TxD
SCK
RDR
RSR
TDR
TSR
SSR
SCR
SMR
Transmit/
receive control
BRR
Baud rate
generator
Parity generation
Parity check
Clock
External clock
Legend:
RSR: Receive shift register
RDR: Receive data register
TSR: Transmit shift register
TDR: Transmit data register
SMR: Serial mode register
SCR: Serial control register
SSR: Serial status register
BRR: Bit rate register
Figure 11.1 SCI Block Diagram
φ
φ/4
φ/16
φ/64
TEI
TXI
RXI
ERI
Rev.3.00 Mar. 26, 2007 Page 333 of 682
REJ09B0353-0300