HD64F3039F18 Datasheet, PDF (280/710 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8 Family / H8/300H Series

Section 8 16-Bit Integrated Timer Unit (ITU)
Figure 8.36 shows examples of waveforms with 0% and 100% duty cycles (in one phase) in
complementary PWM mode. In this example the outputs change at compare match with GRB3, so
waveforms with duty cycles of 0% or 100% can be output by setting GRB3 to a value larger than
GRA3. The duty cycle can be changed easily during operation by use of the buffer registers. For
further information see section 8.4.8, Buffering.
TCNT3 and
TCNT4 values
GRA3
GRB3
H'0000
TIOCA₃
TIOCB₃
TCNT3 and
TCNT4 values
GRA3
0% duty cycle
a. 0% duty cycle
Time
GRB3
H'0000
Time
TIOCA₃
TIOCB₃
100% duty cycle
b. 100% duty cycle
Figure 8.36 Operation in Complementary PWM Mode (Example 2)
(when OLS3 = OLS4 = 1)
Rev.3.00 Mar. 26, 2007 Page 256 of 682
REJ09B0353-0300