HD64F3039F18 Datasheet, PDF (652/710 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8 Family / H8/300H Series

Appendix B Internal I/O Register Field
TCSR—Timer Control/Status Register
Bit
7
6
5
4
OVF WT/IT TME
—
Initial value
0
0
0
1
Read/Write R/(W)* R/W R/W
—
H'A8
WDT
3
2
1
0
—
CKS2 CKS1 CKS0
1
0
0
0
—
R/W
R/W
R/W
Clock select 2 to 0
CKS2 CKS1 CKS0 Description
0
0
0 φ/2
1 φ/32
1
0 φ/64
1 φ/128
1
0
0 φ/256
1 φ/512
1
0 φ/2048
1 φ/4096
Timer enable
0 _{TCNT is initialized to H'00 and halted}
1 _{TCNT is counting}
Timer mode select
0 Interval timer: requests interval timer interrupts
1 Watchdog timer: generates a reset signal
Overflow flag
0 [Clearing condition]
Read OVF when OVF = 1, then write 0 in OVF
1 [Setting condition]
TCNT changes from H'FF to H'00
Note: * Only 0 can be written to clear the flag.
Rev.3.00 Mar. 26, 2007 Page 628 of 682
REJ09B0353-0300