HD64F3039F18 Datasheet, PDF (37/710 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8 Family / H8/300H Series

Section 1 Overview
Type
System
control
Interrupts
Address bus
Data bus
Bus control
16-bit
integrated
timer unit
(ITU)
Symbol
RES
Pin No.
48
RESO/ 57
FWE
STBY
47
NMI
49
IRQ , IRQ
5
4
IRQ₁, IRQ₀
A₂₃ to A₂₀,
A₁₉ to A₈,
A₇ to A₀
D₇ to D₀
72, 11,
69, 68
77 to 80,
42 to 31,
29 to 22
20 to 13
AS
54
RD
55
WR
56
WAIT
43
TCLKD to 76 to 73
TCLKA
TIOCA₄ to 3, 1, 79,
TIOCA₀ 77, 75
TIOCB to 4, 2, 80,
4
TIOCB₀ 78, 76
TOCXA 5
4
TOCXB 6
4
I/O
Input
Output/
Input
Input
Input
Input
Output
Input/
output
Output
Output
Output
Input
Input
Input/
Output
Input/
output
Output
Output
Name and Function
Reset input: When driven low, this pin resets
the chip
Reset output (Mask ROM version): Outputs
WDT-generated reset signal to an external
device.
Write enable signal (F-ZTAT version): Flash
memory write control signal.
Standby: When driven low, this pin forces a
transition to hardware standby mode
Nonmaskable interrupt: Requests a
nonmaskable interrupt
Interrupt request 5, 4, 1, 0: Maskable
interrupt request pins
Address bus: Outputs address signals
Data bus: Bidirectional data bus
Address strobe: Goes low to indicate valid
address output on the address bus
Read: Goes low to indicate reading from the
external address space.
Write: Goes low to indicate writing to the
external address space indicates valid data on
the data bus.
Wait: Requests insertion of wait states in bus
cycles during access to the external address
space.
Clock input A to D: External clock inputs
Input capture/output compare A4 to A0:
GRA4 to GRA0 output compare or input
capture, or PWM output
Input capture/output compare B4 to B0
GRB4 to GRB0 output compare or input
capture, or PWM output
Output compare XA4: PWM output
Output compare XB4: PWM output
Rev.3.00 Mar. 26, 2007 Page 13 of 682
REJ09B0353-0300