HD64F3039F18 Datasheet, PDF (435/710 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8 Family / H8/300H Series

Section 12 Smart Card Interface
12.4 Usage Note
The following points should be noted when using the SCI as a smart card interface.
Receive Data Sampling Timing and Reception Margin in Smart Card Interface Mode
In smart card interface mode, the SCI operates on a basic clock with a frequency of 372 times the
transfer rate.
In reception, the SCI samples the falling edge of the start bit using the basic clock, and performs
internal synchronization. Receive data is latched internally at the rising edge of the 186th pulse of
the basic clock. This is illustrated in figure 12.7.
372 clocks
186 clocks
0
185
371 0
Internal
basic
clock
Receive
data (RxD)
Start bit
D0
185
371 0
D1
Synchro-
nization
sampling
timing
Data
sampling
timing
Figure 12.7 Receive Data Sampling Timing in Smart Card Mode
Rev.3.00 Mar. 26, 2007 Page 411 of 682
REJ09B0353-0300