HD64F3039F18 Datasheet, PDF (420/710 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8 Family / H8/300H Series

Section 12 Smart Card Interface
12.2.2 Serial Status Register (SSR)
Bit
Initial value
R/W
7
TDRE
1
R/(W)*
6
RDRF
0
R/(W)*
5
ORER
0
R/(W)*
4
ERS
0
R/(W)*
3
PER
0
R/(W)*
2
TEND
1
R
1
MPB
0
R
0
MPBT
0
R/W
Transmit end
Status flag indicating
end of transmission
Error signal status
Status flag indicating that an
error signal has been received
Note: * Only 0 can be written to bits 7 to 3, to clear these flags.
Bit 4 of SSR has a different function in Smart Card interface mode. Coupled with this, the setting
conditions for bit 2, TEND, are also different.
Bits 7 to 5—Operate in the same way as for the normal SCI. For details, see section 11.2.7, Serial
Status Register (SSR).
Bit 4—Error Signal Status (ERS): In Smart Card interface mode, bit 4 indicates the status of the
error signal sent back from the receiving end in transmission. Framing errors are not detected in
Smart Card interface mode.
Bit 4
ERS
Description
0
Indicates normal data transmission, with no error signal returned
[Clearing conditions]
(Initial value)
• Upon reset, in standby mode, or in module stop mode
• When 0 is written to ERS after reading ERS = 1
1
Indicates that the receiving device sent an error signal reporting a parity error
[Setting condition]
When the low level of the error signal is sampled
Note: Clearing the TE bit in SCR to 0 does not affect the ERS flag, which retains its previous
state.
Rev.3.00 Mar. 26, 2007 Page 396 of 682
REJ09B0353-0300