HD64F3039F18 Datasheet, PDF (437/710 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8 Family / H8/300H Series

Section 12 Smart Card Interface
Retransfer Operations
Retransfer operations are performed by the SCI in receive mode and transmit mode as described
below.
• Retransfer operation when SCI is in receive mode
Figure 12.8 illustrates the retransfer operation when the SCI is in receive mode.
[1] If an error is found when the received parity bit is checked, the PER bit in SSR is
automatically set to 1. If the RIE bit in SCR is enabled at this time, an ERI interrupt request is
generated. The PER bit in SSR should be kept cleared to 0 until the next parity bit is sampled.
[2] The RDRF bit in SSR is not set for a frame in which an error has occurred.
[3] If no error is found when the received parity bit is checked, the PER bit in SSR is not set to 1.
[4] If no error is found when the received parity bit is checked, the receive operation is judged to
have been completed normally, and the RDRF flag in SSR is automatically set to 1. If the RIE
bit in SCR is enabled at this time, an RXI interrupt request is generated.
[5] When a normal frame is received, the pin retains the high-impedance state at the timing for
error signal transmission.
nth transfer frame
Ds D0 D1 D2 D3 D4 D5 D6 D7 Dp DE
Retransferred frame
Transfer
frame n+1
(DE)
Ds D0 D1 D2 D3 D4 D5 D6 D7 Dp Ds D0 D1 D2 D3 D4
RDRF
[2]
[4]
PER
[1]
[3]
Figure 12.8 Retransfer Operation in SCI Receive Mode
Rev.3.00 Mar. 26, 2007 Page 413 of 682
REJ09B0353-0300