HD64F3039F18 Datasheet, PDF (292/710 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8 Family / H8/300H Series

Section 8 16-Bit Integrated Timer Unit (ITU)
Figure 8.53 shows an example in which GRB3 is buffered by BRB3 in complementary PWM
mode. Buffering is used to set GRB3 to a higher value than GRA3, generating a PWM waveform
with 0% duty cycle. The BRB3 value is transferred to GRB3 when TCNT3 matches GRA3, and
when TCNT4 underflows.
TCNT3 and
TCNT4 values
H'1FFF
GRA3
TCNT3
TCNT4
GRB3
H'0999
H'0000
BRB3
H'0999
GRB3 H'0999
H'1FFF
H'0999
H'1FFF
Time
H'0999
H'1FFF
H'0999
TIOCA₃
TIOCB₃
Figure 8.53 Register Buffering (Example 4: Buffering in Complementary PWM Mode)
Rev.3.00 Mar. 26, 2007 Page 268 of 682
REJ09B0353-0300