HD64F3039F18 Datasheet, PDF (14/710 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8 Family / H8/300H Series

2.8.6 Power-Down State ............................................................................................... 53
2.9 Basic Operational Timing ................................................................................................. 54
2.9.1 Overview.............................................................................................................. 54
2.9.2 On-Chip Memory Access Timing........................................................................ 54
2.9.3 On-Chip Supporting Module Access Timing ...................................................... 55
2.9.4 Access to External Address Space ....................................................................... 56
Section 3 MCU Operating Modes .................................................................................. 57
3.1 Overview........................................................................................................................... 57
3.1.1 Operating Mode Selection ................................................................................... 57
3.1.2 Register Configuration......................................................................................... 58
3.2 Mode Control Register (MDCR) ...................................................................................... 59
3.3 System Control Register (SYSCR) ................................................................................... 60
3.4 Operating Mode Descriptions ........................................................................................... 62
3.4.1 Mode 1 ................................................................................................................. 62
3.4.2 Mode 3 ................................................................................................................. 62
3.4.3 Mode 5 ................................................................................................................. 62
3.4.4 Mode 6 ................................................................................................................. 62
3.4.5 Mode 7 ................................................................................................................. 62
3.5 Pin Functions in Each Operating Mode ............................................................................ 63
3.6 Memory Map in Each Operating Mode ............................................................................ 63
3.7 Restrictions on Use of Mode 6.......................................................................................... 72
Section 4 Exception Handling ......................................................................................... 75
4.1 Overview........................................................................................................................... 75
4.1.1 Exception Handling Types and Priority............................................................... 75
4.1.2 Exception Handling Operation ............................................................................ 75
4.1.3 Exception Vector Table ....................................................................................... 76
4.2 Reset.................................................................................................................................. 78
4.2.1 Overview.............................................................................................................. 78
4.2.2 Reset Sequence .................................................................................................... 78
4.2.3 Interrupts after Reset............................................................................................ 80
4.3 Interrupts........................................................................................................................... 80
4.4 Trap Instruction................................................................................................................. 81
4.5 Stack Status after Exception Handling.............................................................................. 81
4.6 Notes on Stack Usage ....................................................................................................... 82
Section 5 Interrupt Controller .......................................................................................... 83
5.1 Overview........................................................................................................................... 83
5.1.1 Features................................................................................................................ 83
5.1.2 Block Diagram..................................................................................................... 84
Rev.3.00 Mar. 26, 2007 Page xii of xxii
REJ09B0353-0300