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HD64F3039F18 Datasheet, PDF (488/710 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8 Family / H8/300H Series
Section 15 ROM
Next, the watchdog timer (WDT) is set to prevent overprogramming due to program runaway, etc.
Set a value greater than (y + z + α + ß) µs as the WDT overflow period. Preparation for entering
program mode (program setup) is performed next by setting the PSU bit in FLMCR. The
operating mode is then switched to program mode by setting the P bit in FLMCR after the elapse
of at least (y) µs.
The time while the P bit is set is the flash memory programming time. Make a program setting so
that the time for one programming operation is within the range of (z) µs.
The wait time after P bit setting must be changed according to the number of reprogramming
loops. For details, see section 18.2.5, Flash Memory Characteristics.
15.5.2 Program-Verify Mode
In program-verify mode, the data written in program mode is read to check whether it has been
correctly written in the flash memory.
Clear the P bit in FLMCR, then wait for at least (α) µs before clearing the PSU bit to exit program
mode. After exiting program mode, the watchdog timer setting is also cleared. Then the operating
mode is switched to program-verify mode by setting the PV bit in FLMCR. Before reading in
program-verify mode, a dummy write of H'FF data should be made to the addresses to be read.
The dummy write should be executed after the elapse of (γ) µs or more. When the flash memory is
read in this state (verify data is read in 16-bit units), the data at the latched address is read. Wait at
least (ε) µs after the dummy write before performing this read operation. Next, the originally
written data is compared with the verify data, and reprogram data is computed (see figure 15.11)
and transferred to RAM. After verification of 32 bytes of data has been completed, exit program-
verify mode, wait for at least (η) µs, then determine whether 32-byte programming has finished. If
reprogramming is necessary, set program mode again, and repeat the program/program-verify
sequence as before. However, ensure that the program/program-verify sequence is not repeated
more than (N) times on the same bits.
Note: A 32-byte area to store program data and a 32-byte area to store reprogram data are
required in RAM.
Rev.3.00 Mar. 26, 2007 Page 464 of 682
REJ09B0353-0300