HD64F3039F18 Datasheet, PDF (405/710 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8 Family / H8/300H Series

Section 11 Serial Communication Interface
3
Error handling
Overrun error handling
Clear ORER flag to 0 in SSR
End
Figure 11.18 Sample Flowchart for Serial Receiving (2)
In receiving, the SCI operates as follows.
• The SCI synchronizes with serial clock input or output and initializes internally.
• Receive data is stored in RSR in order from LSB to MSB.
After receiving the data, the SCI checks that the RDRF flag is 0 so that receive data can be
transferred from RSR to RDR. If this check passes, the RDRF flag is set to 1 and the received
data is stored in RDR. If the check does not pass (receive error), the SCI operates as indicated
in table 11.11. If any receive error is detected, the subsequent data transmission/reception is
disabled.
• After setting the RDRF flag to 1, if the RIE bit is set to 1 in SCR, the SCI requests a receive-
data-full interrupt (RXI). If the ORER flag is set to 1 and the RIE bit in SCR is also set to 1,
the SCI requests a receive-error interrupt (ERI).
Rev.3.00 Mar. 26, 2007 Page 381 of 682
REJ09B0353-0300