HD64F3039F18 Datasheet, PDF (427/710 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8 Family / H8/300H Series

Section 12 Smart Card Interface
12.3.5 Clock
Only an internal clock generated by the on-chip baud rate generator can be used as the
transmit/receive clock for the smart card interface. The bit rate is set with BRR and the CKS1 and
CKS0 bits in SMR. The formula for calculating the bit rate is as shown below. Table 12.5 shows
some sample bit rates.
If clock output is selected by setting CKE0 to 1, a clock with a frequency of 372 times the bit rate
is output from the SCK₀ pin.
B=
φ
× 10⁶
1488 × 2^2n–1 × (N + 1)
Where: N = Value set in BRR (0 ≤ N ≤ 255)
B = Bit rate (bit/s)
φ = Operating frequency* (MHz)
n = See table 12.4
Table 12.4 Correspondence between n and CKS1, CKS0
n
CKS1
CKS0
0
0
0
1
1
2
1
0
3
1
Note: * If the gear function is used to divide the system clock frequency, use the divided
frequency to calculate the bit rate. The equation above applies directly to 1/1 frequency
division.
Table 12.5 Examples of Bit Rate B (bit/s) for Various BRR Settings (When n = 0)
φ (MHz)
N
7.1424 10.00
10.7136 13.00
0
9600.0 13440.9 14400.0 17473.1
1
4800.0 6720.4 7200.0 8736.6
2
3200.0 4480.3 4800.0 5824.4
Note: Bit rates are rounded off to one decimal place.
14.2848
19200.0
9600.0
6400.0
16.00
21505.4
10752.7
7168.5
18.00
24193.5
12096.8
8064.5
Rev.3.00 Mar. 26, 2007 Page 403 of 682
REJ09B0353-0300