HD64F3039F18 Datasheet, PDF (281/710 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8 Family / H8/300H Series

Section 8 16-Bit Integrated Timer Unit (ITU)
In complementary PWM mode, TCNT3 and TCNT4 overshoot and undershoot at the transitions
between up-counting and down-counting. The setting conditions for the IMFA bit in channel 3 and
the OVF bit in channel 4 differ from the usual conditions. In buffered operation the buffer transfer
conditions also differ. Timing diagrams are shown in figures 8.37 and 8.38.
TCNT3
NÐ1
N
N+1
N
NÐ1
GRA3
IMFA
Buffer transfer
signal (BR to GR)
GR
N
Set to 1
Buffer transfer
Figure 8.37 Overshoot Timing
Flag not set
No buffer transfer
Rev.3.00 Mar. 26, 2007 Page 257 of 682
REJ09B0353-0300