HD64F3039F18 Datasheet, PDF (659/710 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8 Family / H8/300H Series

RDR—Receive Data Register
Appendix B Internal I/O Register Field
H'B5
SCI0
Bit
7
6
5
4
3
2
1
0
Initial value
0
0
0
0
0
0
0
0
Read/Write
R
R
R
R
R
R
R
R
Serial receive data
SCMR—Smart Card Mode Register
Bit
7
—
Initial value
1
Read/Write
—
6
5
—
—
1
1
—
—
H'B6
SCI0
4
3
2
1
0
—
SDIR SINV
—
SMIF
1
0
0
1
0
—
R/W R/W
—
R/W
Smart card interface mode select
0 Smart card interface function is disabled
1 Smart card interface function is enabled
Smart card data invert
0 Unmodified TDR contents are transmitted
Received data is stored unmodified in RDR
1 Inverted 1/0 logic levels of TDR contents are transmitted
1/0 logic levels of received data are inverted before storage in RDR
Smart card data transfer direction
0 TDR contents are transmitted LSB-first
Received data is stored LSB-first in RDR
1 TDR contents are transmitted MSB-first
Received data is stored MSB-first in RDR
Rev.3.00 Mar. 26, 2007 Page 635 of 682
REJ09B0353-0300