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HD64F3039F18 Datasheet, PDF (556/710 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8 Family / H8/300H Series
Section 18 Electrical Characteristics
Table 18.5 Control Signal Timing
Condition A: VCC = 2.7 V to 5.5 V, AVCC = 2.7 V to 5.5 V, VSS = AVSS = 0 V, φ = 2 MHz to
8 MHz, Ta = –20°C to +75°C (regular specifications), Ta = –40°C to +85°C (wide-
range specifications)
Condition B: VCC = 3.0 V to 5.5 V, AVCC = 3.0 V to 5.5 V, VSS = AVSS = 0 V, φ = 2 MHz to
10 MHz, Ta = –20°C to +75°C (regular specifications), Ta = –40°C to +85°C (wide-
range specifications)
Condition C: VCC = 5.0 V ±10%, AVCC = 5.0 V ±10%, VSS = AVSS = 0 V, φ = 2 MHz to 18 MHz,
Ta = –20°C to +75°C (regular specifications), Ta = –40°C to +85°C (wide-range
specifications)
Item
Symbol
RES setup time
tRESS
RES pulse width
tRESW
Mode programming tMDS
setup time (MD0, MD1,
MD2)
RESO output delay tRESD
time
RESO output pulse
width
tRESOW
NMI setup time
tNMIS
(NMI, IRQ0, IRQ1,
IRQ4, IRQ5)
NMI hold time
tNMIH
(NMI, IRQ0, IRQ1,
IRQ4, IRQ5)
Interrupt pulse width tNMIW
(NMI, IRQ1, IRQ0
when exiting software
standby mode)
Clock oscillator
tOSC1
settling time at reset
(crystal)
Clock oscillator
tOSC2
settling time in
software standby
(crystal)
Condition A
8 MHz
Min Max
200 —
10 —
200 —
— 100
132 —
200 —
10 —
200 —
20 —
8
—
Condition B
10 MHz
Min Max
200 —
10 —
200 —
— 100
132 —
200 —
10 —
200 —
20 —
8
—
Condition C
18 MHz
Min Max Unit Test Conditions
200 — ns Figure 18.10
10 — tcyc
200 — ns
— 100 ns Figure 18.11
132 — tcyc
150 — ns Figure 18.12
10 —
200 —
20 — ms Figure 18.13
7
— ms Figure 17.1
Rev.3.00 Mar. 26, 2007 Page 532 of 682
REJ09B0353-0300