HD64F3039F18 Datasheet, PDF (28/710 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8 Family / H8/300H Series

Section 1 Overview
Feature
Programmable
timing pattern
controller (TPC)
Watchdog timer
(WDT), 1 channel
Serial
communication
interface (SCI),
2 channels
A/D converter
I/O ports
Operating modes
Power-down state
Description
• Maximum 15-bit pulse output, using ITU as time base
• Up to three 4-bit pulse output groups and one 3-bit pulse output group (or
one 15-bit group, one 8-bit group, or one 7-bit group)
• Non-overlap mode available
• Reset signal can be generated by overflow
• Reset signal can be output externally (However, not available with the
F-ZTAT version.)
• Usable as an interval timer
• Selection of asynchronous or synchronous mode
• Full duplex: can transmit and receive simultaneously
• On-chip baud-rate generator
• Smart card interface functions added (SCI0 only)
• Resolution: 10 bits
• Eight channels, with selection of single or scan mode
• Variable analog conversion voltage range
• Sample-and-hold function
• Can be externally triggered
• 55 input/output pins
• 8 input-only pins
Five MCU operating modes
Mode
Address Space Address Pins Bus Width
Mode 1
Mode 3
Mode 5
Mode 6
1 Mbyte
16 Mbytes
1 Mbyte
64 kbytes
A₀ to A₁₉
A₂₃ to A₀
A₀ to A₁₉
—
8 bits
8 bits
8 bits
—
Mode 7 1 Mbyte
—
—
• On-chip ROM is disabled in modes 1 and 3
• Sleep mode
• Software standby mode
• Hardware standby mode
• Module standby function
• Programmable System clock frequency division
Rev.3.00 Mar. 26, 2007 Page 4 of 682
REJ09B0353-0300