HD64F3039F18 Datasheet, PDF (403/710 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8 Family / H8/300H Series

Section 11 Serial Communication Interface
In transmitting serial data, the SCI operates as follows.
• The SCI monitors the TDRE flag in SSR. When the TDRE flag is cleared to 0 the SCI
recognizes that TDR contains new data, and loads this data from TDR into TSR.
• After loading the data from TDR into TSR, the SCI sets the TDRE flag to 1 and starts
transmitting. If the TIE bit is set to 1 in SCR, the SCI requests a transmit-data-empty interrupt
(TXI) at this time.
If clock output is selected, the SCI outputs eight serial clock pulses. If an external clock source
is selected, the SCI outputs data in synchronization with the input clock. Data is output from
the TxD pin in order from LSB (bit 0) to MSB (bit 7).
• The SCI checks the TDRE flag when it outputs the MSB (bit 7). If the TDRE flag is 0, the SCI
loads data from TDR into TSR and begins serial transmission of the next frame. If the TDRE
flag is 1, the SCI sets the TEND flag to 1 in SSR, and after transmitting the MSB, holds the
TxD pin in the MSB state. If the TEIE bit in SCR is set to 1, a transmit-end interrupt (TEI) is
requested at this time.
• After the end of serial transmission, the SCK pin is held in a constant state.
Figure 11.17 shows an example of SCI transmit operation.
Transmit
direction
Serial clock
Serial data
Bit 0 Bit 1
Bit 7 Bit 0 Bit 1
Bit 6 Bit 7
TDRE
TEND
TXI
request
TXI interrupt handler
writes data in TDR
and clears TDRE
flag to 0
TXI
request
TEI
request
1 frame
Figure 11.17 Example of SCI Transmit Operation
Rev.3.00 Mar. 26, 2007 Page 379 of 682
REJ09B0353-0300