HD64F3039F18 Datasheet, PDF (136/710 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8 Family / H8/300H Series

Section 6 Bus Controller
6.1.2 Block Diagram
Figure 6.1 shows a block diagram of the bus controller.
Internal
address bus
Area
decoder
ASTCR
WCER
Bus control
circuit
Internal signals
Access state control signal
Wait request signal
WAIT
Wait-state
controller
WCR
Legend:
ASTCR: Access state control register
WCER: Wait state controller enable register
WCR: Wait control register
Figure 6.1 Block Diagram of Bus Controller
Rev.3.00 Mar. 26, 2007 Page 112 of 682
REJ09B0353-0300