HD64F3039F18 Datasheet, PDF (364/710 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8 Family / H8/300H Series

Section 11 Serial Communication Interface
Bit 3
STOP
Description
0
One stop bit*¹
(Initial value)
1
Two stop bits*²
Notes: 1. One stop bit (with value 1) is added at the end of each transmitted character.
2. Two stop bits (with value 1) are added at the end of each transmitted character.
In receiving, only the first stop bit is checked, regardless of the STOP bit setting. If the second
stop bit is 1 it is treated as a stop bit. If the second stop bit is 0 it is treated as the start bit of the
next incoming character.
Bit 2—Multiprocessor Mode (MP): Selects a multiprocessor format. When a multiprocessor
format is selected, parity settings made by the PE and O/E bits are ignored. The MP bit setting is
valid only in asynchronous mode. It is ignored in synchronous mode.
For further information on the multiprocessor communication function, see section 11.3.3,
Multiprocessor Communication.
Bit 2
MP
0
1
Description
Multiprocessor function disabled
Multiprocessor format selected
(Initial value)
Bits 1 and 0—Clock Select 1 and 0 (CKS1/0): These bits select the clock source of the on-chip
baud rate generator. Four clock sources are available: φ, φ/4, φ/16, and φ/64.
For the relationship between the clock source, bit rate register setting, and baud rate, see section
11.2.8, Bit Rate Register (BRR).
Bit 1
CKS1
0
0
1
1
Bit 0
CKS0
0
1
0
1
Description
φ clock selected
φ/4 clock selected
φ/16 clock selected
φ/64 clock selected
(Initial value)
Rev.3.00 Mar. 26, 2007 Page 340 of 682
REJ09B0353-0300