HD64F3039F18 Datasheet, PDF (118/710 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8 Family / H8/300H Series

Section 5 Interrupt Controller
5.2.4 IRQ Enable Register (IER)
IER is an 8-bit readable/writable register that enables or disables IRQ₀, IRQ₁, IRQ₄, and IRQ₅
interrupt requests.
Bit
7
6
5
4
3
2
1
0
—
— IRQ5E IRQ4E —
— IRQ1E IRQ0E
Initial value
0
0
0
0
0
0
0
0
Read/Write
R/W
R/W R/W R/W R/W
R/W R/W R/W
Reserved bits
Reserved bits
IRQ₅ to IRQ₄ enable
These bits enable or disable
IRQ₅ and IRQ₄ interrupts
IRQ₁ to IRQ₀ enable
These bits enable or disable
IRQ₁ and IRQ₀ interrupts
IER is initialized to H'00 by a reset and in hardware standby mode.
Bits 7, 6, 3, and 2—Reserved: These bits cannot be modified and are always read as 0.
Bits 5, 4, 1, and 0—IRQ₅, IRQ₄, IRQ₁, and IRQ₀ Enable (IRQ5E, IRQ4E, IRQ1E, IRQ0E):
These bits enable or disable IRQ5, IRQ4, IRQ1, IRQ0 interrupts.
Bits 5, 4, 1, and 0
IRQ5E, IRQ4E,
IRQ1E, and IRQ0E
0
1
Description
IRQ , IRQ , IRQ , IRQ interrupts are disabled
5
4
1
0
IRQ₅, IRQ₄, IRQ₁, IRQ₀ interrupts are enabled
(Initial value)
Rev.3.00 Mar. 26, 2007 Page 94 of 682
REJ09B0353-0300