HD64F3039F18 Datasheet, PDF (110/710 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8 Family / H8/300H Series

Section 5 Interrupt Controller
5.2 Register Descriptions
5.2.1 System Control Register (SYSCR)
SYSCR is an 8-bit readable/writable register that controls software standby mode, selects the
action of the UI bit in CCR, selects the NMI edge, and enables or disables the on-chip RAM.
Only bits 3 and 2 are described here. For the other bits, see section 3.3, System Control Register
(SYSCR).
SYSCR is initialized to H'0B by a reset and in hardware standby mode. It is not initialized in
software standby mode.
Bit
7
6
5
4
3
2
1
0
SSBY STS2 STS1 STS0 UE NMIEG — RAME
Initial value
0
0
0
0
1
0
1
1
Read/Write
R/W
R/W R/W R/W R/W R/W
—
R/W
Standby timer
select 2 to 0
Software standby
RAM enable
Reserved bit
NMI edge select
Selects the NMI input edge
User bit enable
Selects whether to use the UI bit in CCR
as a user bit or interrupt mask bit
Rev.3.00 Mar. 26, 2007 Page 86 of 682
REJ09B0353-0300