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HD64F3039F18 Datasheet, PDF (575/710 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8 Family / H8/300H Series
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Section 18 Electrical Characteristics
Table 18.15 Flash Memory Characteristics (2)
Conditions: VCC = 3.0 V to 3.6 V, AVCC = 3.0 V to 3.6 V, VSS = AVSS = 0 V
Ta = 0°C to +75°C (Programming/erasing operating temperature range: regular
specification) Ta = 0°C to +85°C (Programming/erasing operating temperature range:
wide-range specification)
Item
Symbol Min Typ Max Unit
Test
condition
Programming time*1 *2 *4
tP
Erase time*1 *3 *5
tE
Reprogramming count
NWEC
Programming Wait time after SWE bit setting*1
x
—
10
200 ms/32 bytes
—
100 300 ms/block
—
—
100 Times
10
—
—
µs
Wait time after PSU bit setting*1
y
50
—
—
µs
Wait time after P bit setting*1 *4
z
150 —
500 µs
Wait time after P bit clear*1
α
10
—
—
µs
Wait time after PSU bit clear*1
β
10
—
—
µs
Wait time after PV bit setting*1
γ
4
—
—
µs
Wait time after H'FF dummy write*1 ε
2
—
—
µs
Wait time after PV bit clear*1
η
4
—
—
µs
Maximum programming count*1,*4 N
—
—
403 Times
Erase
Wait time after SWE bit setting*1
x
10
—
—
µs
Wait time after ESU bit setting*1
y
200 —
—
µs
Wait time after E bit setting*1 *5
z
5
—
10
ms
Wait time after E bit clear*1
α
10
—
—
µs
Wait time after ESU bit clear*1
β
10
—
—
µs
Wait time after EV bit setting*1
γ
20
—
—
µs
Wait time after H'FF dummy write*1 ε
2
—
—
µs
Wait time after EV bit clear*1
η
5
—
—
µs
Maximum erase count*1 *5
N
30
—
60
Times
Notes: 1. Make each time setting in accordance with the program/program-verify flowchart or
erase/erase-verify flowchart.
2. Programming time per 32 bytes (Shows the total period for which the P-bit in the flash
memory control register (FLMCR) is set. It does not include the programming
verification time.)
3. Block erase time (Shows the total period for which the E-bit in FLMCR is set. It does not
include the erase verification time.)
Rev.3.00 Mar. 26, 2007 Page 551 of 682
REJ09B0353-0300
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