HD64F3039F18 Datasheet, PDF (140/710 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8 Family / H8/300H Series

Section 6 Bus Controller
Bits 1 and 0—Wait Count 1 and 0 (WC1/0): These bits select the number of wait states inserted
in access to external three-state-access areas.
Bit1
WC1
0
1
Bit0
WC0
0
1
0
1
Description
No wait states inserted by wait-state controller
1 state inserted
2 states inserted
3 states inserted
(Initial value)
6.2.3 Wait State Controller Enable Register (WCER)
WCER is an 8-bit readable/writable register that enables or disables wait-state control of external
three-state-access areas by the wait-state controller.
Bit
Initial value
Read/Write
7
WCE7
1
R/W
6
WCE6
1
R/W
5
WCE5
1
R/W
4
WCE4
1
R/W
3
WCE3
1
R/W
2
WCE2
1
R/W
1
WCE1
1
R/W
0
WCE0
1
R/W
Wait state controller enable 7 to 0
These bits enable or disable wait-state control
WCER is initialized to H'FF by a reset and in hardware standby mode. It is not initialized in
software standby mode.
Bits 7 to 0—Wait-State Controller Enable 7 to 0 (WCE7 to WCE0): These bits enable or
disable wait-state control of external three-state-access areas.
Bits 7 to 0
WCE7 to WCE0
0
1
Description
Wait-state control disabled (pin wait mode 0)
Wait-state control enabled
(Initial value)
WCER enables or disables wait-state control of external three-state-access areas. Therefore, in the
single-chip modes (modes 6 and 7), the set value is meaningless.
Rev.3.00 Mar. 26, 2007 Page 116 of 682
REJ09B0353-0300