HD64F3039F18 Datasheet, PDF (85/710 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8 Family / H8/300H Series

Section 3 MCU Operating Modes
least 7 ms at the system clock rate. For further information about waiting time selection, see
section 17.4.3, Selection of Oscillator Waiting Time after Exit from Software Standby Mode.
Bit 6
STS2
0
0
0
0
1
1
1
Bit 5
STS1
0
0
1
1
0
0
1
Bit 4
STS0
0
1
0
1
0
1
—
Description
Waiting time = 8,192 states
Waiting time = 16,384 states
Waiting time = 32,768 states
Waiting time = 65,536 states
Waiting time = 131,072 states
Waiting time = 1,024 states
Illegal setting
(Initial value)
Bit 3—User Bit Enable (UE): Selects whether to use the UI bit in the condition code register as a
user bit or an interrupt mask bit.
Bit 3
UE
0
1
Description
UI bit in CCR is used as an interrupt mask bit
UI bit in CCR is used as a user bit
(Initial value)
Bit 2—NMI Edge Select (NMIEG): Selects the valid edge of the NMI input.
Bit 2
NMIEG
0
1
Description
An interrupt is requested at the falling edge of NMI
An interrupt is requested at the rising edge of NMI
(Initial value)
Bit 1—Reserved: This bit cannot be modified and is always read as 1.
Bit 0—RAM Enable (RAME): Enables or disables the on-chip RAM. The RAME bit is
initialized by the rising edge of the RES signal. It is not initialized in software standby mode.
Bit 0
RAME
0
1
Description
On-chip RAM is disabled
On-chip RAM is enabled
(Initial value)
Rev.3.00 Mar. 26, 2007 Page 61 of 682
REJ09B0353-0300