HD64F3039F18 Datasheet, PDF (699/710 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8 Family / H8/300H Series

Appendix D Pin States
Pin Name Mode
Reset
State
Hardware
Software
Program Execution
Standby Mode Standby Mode State Sleep Mode
P8₁
1, 3, 5
T
T
T [DDR = 0]
H [DDR = 1]
Input port [DDR = 0]
H [DDR = 1]
6, 7
T
T
keep
I/O port
P9₅ to P9₀ 1, 3, 5 to 7 T
T
PA ₃ to PA ₀ 1, 3, 5 to 7 T
T
PA₆ to PA₄ 3
T
T
keep
keep
[ADRCR = 0]
T
[ADRCR = 1]
keep
I/O port
I/O port
(ADRCR = 0)
A to A
21
23
(ADRCR = 1)
I/O port
1, 5, 6, 7 T
T
keep
I/O port
PA
3
L
T
7
1, 5, 6, 7 T
T
T
keep
A
20
I/O port
PB₇, PB₅ to 1, 3, 5 to 7 T
T
PB
0
keep
I/O port
Legend:
H:
High
L:
Low
T:
High-impedance state
keep: Input pins are in the high-impedance state; output pins maintain their previous state.
DDR: Data direction register bit
ADRCR: Address control register
Notes: 1 Mask ROM version. Dedicated FWE input pin for the F-ZTAT version.
2 Low output only when WDT overflows causes a reset.
Rev.3.00 Mar. 26, 2007 Page 675 of 682
REJ09B0353-0300