HD64F3039F18 Datasheet, PDF (585/710 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8 Family / H8/300H Series

Appendix A Instruction Set
Appendix A Instruction Set
A.1 Instruction List
Operand Notation
Symbol
Rd
Rs
Rn
ERd
ERs
ERn
(EAd)
(EAs)
PC
SP
CCR
N
Z
V
C
disp
→
+
–
×
÷
∧
•
⊕
¬
( ), < >
Note: *
Description
General destination register*
General source register*
General register*
General destination register (address register or 32-bit register)
General source register (address register or 32-bit register)
General register (32-bit register)
Destination operand
Source operand
Program counter
Stack pointer
Condition code register
N (negative) flag in CCR
Z (zero) flag in CCR
V (overflow) flag in CCR
C (carry) flag in CCR
Displacement
Transfer from the operand on the left to the operand on the right, or transition from
the state on the left to the state on the right
Addition of the operands on both sides
Subtraction of the operand on the right from the operand on the left
Multiplication of the operands on both sides
Division of the operand on the left by the operand on the right
Logical AND of the operands on both sides
Logical OR of the operands on both sides
Exclusive logical OR of the operands on both sides
NOT (logical complement)
Contents of operand
General registers include 8-bit registers (R0H to R7H and R0L to R7L) and 16-bit
registers (R0 to R7 and E0 to E7).
Rev.3.00 Mar. 26, 2007 Page 561 of 682
REJ09B0353-0300