HD64F3039F18 Datasheet, PDF (397/710 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8 Family / H8/300H Series

Section 11 Serial Communication Interface
Receiving Multiprocessor Serial Data: Figure 11.12 shows a sample flowchart for receiving
multiprocessor serial data and indicates the procedure to follow.
Initialize
1
Start receiving
Set MPIE bit to 1 in SCR
2
Read ORER and FER flags in SSR
Yes
FER ∨ ORER = 1 ?
No
Read RDRF flag in SSR
3
No
RDRF = 1?
Yes
Read receive data from RDR
No
Own ID?
Yes
Read ORER and FER flags in SSR
FER ∨ ORER = 1 ?
No
Read RDRF flag in SSR
Yes
4
No
RDRF = 1?
Yes
Read receive data from RDR
1. SCI initialization: the receive data function
of the RxD pin is selected automatically.
2. ID receive cycle: set the MPIE bit to 1 in SCR.
3. SCI status check and ID check: read SSR,
check that the RDRF flag is set to 1, then read
data from RDR and compare with the
processor's own ID. If the ID does not match,
set the MPIE bit to 1 again and clear the
RDRF flag to 0. If the ID matches, clear the
RDRF flag to 0.
4. SCI status check and data receiving: read
SSR, check that the RDRF flag is set to 1,
then read data from RDR.
5. Receive error handling and break detection:
if a receive error occurs, read the
ORER and FER flags in SSR to identify the error.
After executing the necessary error handling,
clear the ORER and FER flags both to 0.
Receiving cannot resume while either the ORER
or FER flag remains set to 1. When a framing
error occurs, the RxD pin can be read to detect
the break state.
No
Finished receiving?
Yes
Clear RE bit to 0 in SCR
5
Error handling
(continued on next page)
End
Figure 11.12 Sample Flowchart for Receiving Multiprocessor Serial Data (1)
Rev.3.00 Mar. 26, 2007 Page 373 of 682
REJ09B0353-0300