HD6413007F20 Datasheet, PDF (732/798 Pages) Renesas Technology Corp – Hardware Manual Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Series

Appendix B Internal I/O Registers
NDERB⎯Next Data Enable Register B
H'FFFA2
TPC
Bit
Initial value
Read/Write
7
6
5
4
3
NDER15 NDER14 NDER13 NDER12 NDER11
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
2
NDER10
0
R/W
1
NDER9
0
R/W
0
NDER8
0
R/W
Next data enable 15 to 8
Bits 7 to 0
NDER15
to NDER8
0
Description
TPC outputs TP15 to TP8 are disabled
(NDR15 to NDR8 are not transferred to PB7 to PB0)
TPC outputs TP15 to TP8 are enabled
1
(NDR15 to NDR8 are transferred to PB7 to PB0)
NDERA⎯Next Data Enable Register A
H'FFFA3
Bit
Initial value
Read/Write
7
NDER7
0
R/W
6
NDER6
0
R/W
5
NDER5
0
R/W
4
NDER4
0
R/W
3
NDER3
0
R/W
2
NDER2
0
R/W
TPC
1
NDER1
0
R/W
0
NDER0
0
R/W
Bits 7 to 0
NDER7
to NDER0
0
Next data enable 7 to 0
Description
TPC outputs TP7 to TP0 are disabled
(NDR7 to NDR0 are not transferred to PA7 to PA0)
TPC outputs TP7 to TP0 are enabled
1
(NDR7 to NDR0 are transferred to PA7 to PA0)
Rev.5.00 Sep. 12, 2007 Page 702 of 764
REJ09B0396-0500