HD6413007F20 Datasheet, PDF (465/798 Pages) Renesas Technology Corp – Hardware Manual Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Series

13. Serial Communication Interface
In receiving, only the first stop bit is checked, regardless of the STOP bit setting. If the second
stop bit is 1, it is treated as a stop bit. If the second stop bit is 0, it is treated as the start bit of the
next incoming character.
Bit 2⎯Multiprocessor Mode (MP): Selects a multiprocessor format. When a multiprocessor
format is selected, parity settings made by the PE and O/E bits are ignored. The MP bit setting is
valid only in asynchronous mode. It is ignored in synchronous mode.
For further information on the multiprocessor communication function, see section 13.3.3,
Multiprocessor Communication.
Bit 2
MP
0
1
Description
Multiprocessor function disabled
Multiprocessor format selected
(Initial value)
Bits 1 and 0⎯Clock Select 1 and 0 (CKS1, CKS0): These bits select the clock source for the on-
chip baud rate generator. Four clock sources are available: φ, φ/4, φ/16, and φ/64.
For the relationship between the clock source, bit rate register setting, and baud rate, see section
13.2.8, Bit Rate Register (BRR).
Bit 1
CKS1
0
0
1
1
Bit 0
CKS0
0
1
0
1
Description
φ
φ/4
φ/16
φ/64
(Initial value)
Rev.5.00 Sep. 12, 2007 Page 435 of 764
REJ09B0396-0500