HD6413007F20 Datasheet, PDF (539/798 Pages) Renesas Technology Corp – Hardware Manual Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Series

14. Smart Card Interface
14.4 Usage Notes
The following points should be noted when using the SCI as a smart card interface.
Receive Data Sampling Timing and Receive Margin in Smart Card Interface Mode: In smart
card interface mode, the SCI operates on a base clock with a frequency of 372 times the transfer
rate. In reception, the SCI synchronizes internally with the fall of the start bit, which it samples on
the base clock. Receive data is latched at the rising edge of the 186th base clock pulse. The timing
is shown in figure 14.11.
372 clocks
186 clocks
0
185
371 0
Internal base
clock
185
371 0
Receive data
(RxD)
Start bit
D0
D1
Synchronization
sampling timing
Data sampling
timing
Figure 14.11 Receive Data Sampling Timing in Smart Card Interface Mode
The receive margin can therefore be expressed as follows.
Receive margin in smart card interface mode:
M = (0.5 – ¹ ) – (L – 0.5) F – ^{D – 0.5} (1 + F) × 100%
2N
N
M: Receive margin (%)
N: Ratio of clock frequency to bit rate (N = 372)
Rev.5.00 Sep. 12, 2007 Page 509 of 764
REJ09B0396-0500