HD6413007F20 Datasheet, PDF (401/798 Pages) Renesas Technology Corp – Hardware Manual Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Series

10. 8-Bit Timers
10.4.3 Input Capture Signal Timing
Input capture on the rising edge, falling edge, or both edges can be selected by settings in 8TCSR.
Figure 10.13 shows the timing when the rising edge is selected.
The pulse width of the input capture input signal must be at least 1.5 system clocks when a single
edge is selected, and at least 2.5 system clocks when both edges are selected.
φ
Input capture input
Input capture signal
8TCNT
N
TCORB
N
Figure 10.13 Timing of Input Capture Input Signal
Rev.5.00 Sep. 12, 2007 Page 371 of 764
REJ09B0396-0500