HD6413007F20 Datasheet, PDF (589/798 Pages) Renesas Technology Corp – Hardware Manual Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Series

19. Power-Down State
19.2.2 Module Standby Control Register H (MSTCRH)
MSTCRH is an 8-bit readable/writable register that controls output of the system clock (φ). It also
controls the module standby function, which places individual on-chip supporting modules in the
standby state. Module standby can be designated for the SCI0, SCI1, SCI2.
Bit
7
6
5
4
3
2
1
0
PSTOP ⎯
⎯
⎯
⎯ MSTPH2 MSTPH1 MSTPH0
Initial value
0
1
1
1
1
0
0
0
Read/Write
R/W
⎯
⎯
⎯
⎯
R/W
R/W
R/W
Reserved bit
φ clock stop
Enables or disables
output of the system clock
Module standby H2 to 0
These bits select modules
to be placed in standby
MSTCRH is initialized to H'78 by a reset and in hardware standby mode. It is not initialized in
software standby mode.
Bit 7—φ Clock Stop (PSTOP): Enables or disables output of the system clock (φ).
Bit 1
PSTOP
0
1
Description
System clock output is enabled
System clock output is disabled
(Initial value)
Bits 6 to 3—Reserved: These bits cannot be modified and are always read as 1.
Bit 2—Module Standby H2 (MSTPH2): Selects whether to place the SCI2 in standby.
Bit 2
MSTPH2
0
1
Description
SCI2 operates normally
SCI2 is in standby state
(Initial value)
Rev.5.00 Sep. 12, 2007 Page 559 of 764
REJ09B0396-0500