HD6413007F20 Datasheet, PDF (36/798 Pages) Renesas Technology Corp – Hardware Manual Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Series

1. Overview
1.2 Internal Block Diagram
Figure 1.1 shows an internal block diagram.
MD2
MD1
MD0
EXTAL
XTAL
STBY
RES
RESO
NMI
AS
RD
HWR
LWR
φ/P67
BACK/P62
BREQ/P61
WAIT/P60
CS0/P84
ADTRG/CS1/IRQ3/P83
CS2/IRQ2/P82
CS3/IRQ1/P81
RFSH/IRQ0/P80
Data bus
Address bus
Data bus (upper)
Data bus (lower)
Port 4
H8/300H CPU
Interrupt controller
DMA controller
(DMAC)
RAM
16-bit timer unit
8-bit timer unit
Programmable
timing pattern
controller (TPC)
Watchdog timer
(WDT)
Serial communication
interface
(SCI) × 3 channels
A/D converter
D/A converter
A19
A18
A17
A16
A15
A14
A13
A12
A11
A10
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
P9₅/SCK₁/IRQ₅
P9₄/SCK₀/IRQ₄
P9₃/RxD₁
P9₂/RxD₀
P9₁/TxD ₁
P9₀/TxD ₀
Port B
Port A
Port 7
Figure 1.1 Block Diagram
Rev.5.00 Sep. 12, 2007 Page 6 of 764
REJ09B0396-0500