HD6413007F20 Datasheet, PDF (242/798 Pages) Renesas Technology Corp – Hardware Manual Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Series

7. DMA Controller
Table 7.7 indicates the register functions in idle mode.
Table 7.7 Register Functions in Idle Mode
Function
Register
Activated by
SCI0 Receive-
Data-Full
Interrupt or
A/D Converter
Conversion
End Interrupt
Other
Activation
23
MAR
0 Destination
address
register
Source
address
register
23
All 1s
7
0 Source
IOAR ^address
register
Destination
address
register
15
0 Transfer counter
ETCR
Legend:
MAR: Memory address register
IOAR: I/O address register
ETCR: Execute transfer count register
Initial Setting Operation
Destination or Held fixed
source address
Source or
destination
address
Number of
transfers
Held fixed
Decremented
once per
transfer until
H'0000 is
reached and
transfer ends
MAR and IOAR specify the source and destination addresses. MAR specifies a 24-bit source or
destination address. IOAR specifies the lower 8 bits of a fixed address. The upper 16 bits are all
1s. MAR and IOAR are not incremented or decremented.
Figure 7.4 illustrates how idle mode operates.
Rev.5.00 Sep. 12, 2007 Page 212 of 764
REJ09B0396-0500