HD6413007F20 Datasheet, PDF (179/798 Pages) Renesas Technology Corp – Hardware Manual Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Series

6. Bus Controller
6.5.5 Pins Used for DRAM Interface
Table 6.7 shows the pins used for DRAM interfacing and their functions.
Table 6.7 DRAM Interface Pins
With DRAM
Pin
Designated Name
PB4
UCAS
Upper column
address strobe
PB5
LCAS
Lower column
address strobe
HWR UCAS
Upper column
address strobe
LWR LCAS
Lower column
address strobe
CS
RAS
2
2
Row address
strobe 2
CS
RAS
3
3
Row address
strobe 3
CS
RAS
4
4
Row address
strobe 4
CS
RAS
5
5
Row address
strobe 5
RD
WE
Write enable
P80
RFSH
Refresh
A₁₂ to A₀ A₁₂ to A₀
Address
D to D D to D
15
0
15
0
Data
Note: * Fixed high in a read access.
I/O
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
I/O
Function
Upper column address strobe for DRAM
space access (when CSEL = 0 in DRCRB)
Lower column address strobe for DRAM
space access (when CSEL = 0 in DRCRB)
Upper column address strobe for DRAM
space access (when CSEL = 1 in DRCRB)
Lower column address strobe for DRAM
space access (when CSEL = 1 in DRCRB)
Row address strobe for DRAM space access
Row address strobe for DRAM space access
Row address strobe for DRAM space access
Row address strobe for DRAM space access
Write enable for DRAM space write access*
Goes low in refresh cycle
Row address/column address multiplexed
output
Data input/output pins
6.5.6 Basic Timing
Figure 6.16 shows the basic access timing for DRAM space. The basic DRAM access timing is
four states: one precharge cycle (T_p) state, one row address output cycle (T_r) state, and two column
address output cycle (T_c1, T_c2) states. Unlike the basic bus interface, the corresponding bits in
ASTCR control only enabling or disabling of wait insertion between T_c1 and T_c2, and do not affect
the number of access states. When the corresponding bit in ASTCR is cleared to 0, wait states
cannot be inserted between T_c1 and T_c2 in the DRAM access cycle.
Rev.5.00 Sep. 12, 2007 Page 149 of 764
REJ09B0396-0500