HD6413007F20 Datasheet, PDF (400/798 Pages) Renesas Technology Corp – Hardware Manual Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Series

10. 8-Bit Timers
Clear by Compare Match: Depending on the setting of the CCLR1 and CCLR0 bits in 8TCR,
8TCNT can be cleared when compare match A or B occurs. Figure 10.11 shows the timing of this
operation.
φ
Compare match signal
8TCNT
N
H'00
Figure 10.11 Timing of Clear by Compare Match
Clear by Input Capture: Depending on the setting of the CCLR1 and CCLR0 bits in 8TCR,
8TCNT can be cleared when input capture B occurs. Figure 10.12 shows the timing of this
operation.
φ
Input capture input
Input capture signal
8TCNT
N
H '00
Figure 10.12 Timing of Clear by Input Capture
Rev.5.00 Sep. 12, 2007 Page 370 of 764
REJ09B0396-0500