HD6413007F20 Datasheet, PDF (708/798 Pages) Renesas Technology Corp – Hardware Manual Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Series

Appendix B Internal I/O Registers
TSNC⎯Timer Syncro Register
Bit
7
6
5
⎯
⎯
⎯
Initial value
1
1
1
Read/Write
⎯
⎯
⎯
H'FFF61
4
3
⎯
⎯
1
1
⎯
⎯
16-Bit Timer (Common)
2
SYNC2
0
R/W
1
SYNC1
0
R/W
0
SYNC0
0
R/W
Reserved bits
Timer sync 0
0
Channel 0 timer counter (16TCNT0) operates independently
(16TCNT0 presetting/clearing unrelated to other channels) (Initial value)
Channel 0 operates synchronously
1 _{16TCNT0 synchronous presetting/synchronous clearing possible}
Timer sync 1
0
Channel 1 timer counter (16TCNT1) operates independently
(16TCNT1 presetting/clearing unrelated to other channels) (Initial value)
Channel 1 operates synchronously
1 _{16TCNT1 synchronous presetting/synchronous clearing possible}
Timer sync 2
0
Channel 2 timer counter (16TCNT2) operates independently
(16TCNT2 presetting/clearing unrelated to other channels) (Initial value)
Channel 2 operates synchronously
1 _{16TCNT2 synchronous presetting/synchronous clearing possible}
Rev.5.00 Sep. 12, 2007 Page 678 of 764
REJ09B0396-0500