HD6413007F20 Datasheet, PDF (646/798 Pages) Renesas Technology Corp – Hardware Manual Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Series

Appendix A Instruction Set
5. Bit manipulation instructions
Addressing Mode and
Instruction Length (bytes)
No. of
States*¹
Mnemonic
BSET #xx:3, Rd
B
2
BSET #xx:3, @ERd B
4
BSET #xx:3, @aa:8 B
4
BSET Rn, Rd
B
2
BSET Rn, @ERd B
4
BSET Rn, @aa:8 B
4
BCLR #xx:3, Rd
B
2
BCLR #xx:3, @ERd B
4
BCLR #xx:3, @aa:8 B
4
BCLR Rn, Rd
B
2
BCLR Rn, @ERd B
4
BCLR Rn, @aa:8 B
4
BNOT #xx:3, Rd
B
2
BNOT #xx:3, @ERd B
4
BNOT #xx:3, @aa:8 B
4
BNOT Rn, Rd
B
2
BNOT Rn, @ERd B
4
BNOT Rn, @aa:8 B
4
BTST #xx:3, Rd
B
2
BTST #xx:3, @ERd B
4
BTST #xx:3, @aa:8 B
4
BTST Rn, Rd
B
2
BTST Rn, @ERd
B
4
BTST Rn, @aa:8
B
4
BLD #xx:3, Rd
B
2
Rev.5.00 Sep. 12, 2007 Page 616 of 764
REJ09B0396-0500
Condition Code
Operation
I HNZVC
(#xx:3 of Rd8) ← 1
⎯⎯⎯⎯⎯⎯ 2
(#xx:3 of @ERd) ← 1 ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ 8
(#xx:3 of @aa:8) ← 1 ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ 8
(Rn8 of Rd8) ← 1
⎯⎯⎯⎯⎯⎯ 2
(Rn8 of @ERd) ← 1
⎯⎯⎯⎯⎯⎯ 8
(Rn8 of @aa:8) ← 1
⎯⎯⎯⎯⎯⎯ 8
(#xx:3 of Rd8) ← 0
⎯⎯⎯⎯⎯⎯ 2
(#xx:3 of @ERd) ← 0 ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ 8
(#xx:3 of @aa:8) ← 0 ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ 8
(Rn8 of Rd8) ← 0
⎯⎯⎯⎯⎯⎯ 2
(Rn8 of @ERd) ← 0
⎯⎯⎯⎯⎯⎯ 8
(Rn8 of @aa:8) ← 0
⎯⎯⎯⎯⎯⎯ 8
(#xx:3 of Rd8) ←
¬ (#xx:3 of Rd8)
⎯⎯⎯⎯⎯⎯ 2
(#xx:3 of @ERd) ←
¬ (#xx:3 of @ERd)
⎯⎯⎯⎯⎯⎯ 8
(#xx:3 of @aa:8) ←
¬ (#xx:3 of @aa:8)
⎯⎯⎯⎯⎯⎯ 8
(Rn8 of Rd8) ←
¬ (Rn8 of Rd8)
⎯⎯⎯⎯⎯⎯ 2
(Rn8 of @ERd) ←
¬ (Rn8 of @ERd)
⎯⎯⎯⎯⎯⎯ 8
(Rn8 of @aa:8) ←
¬ (Rn8 of @aa:8)
⎯⎯⎯⎯⎯⎯ 8
¬ (#xx:3 of Rd8) → Z ⎯ ⎯ ⎯
⎯⎯ 2
¬ (#xx:3 of @ERd) → Z ⎯ ⎯ ⎯ ⎯ ⎯ 6
¬ (#xx:3 of @aa:8) → Z ⎯ ⎯ ⎯ ⎯ ⎯ 6
¬ (Rn8 of @Rd8) → Z ⎯ ⎯ ⎯ ⎯ ⎯ 2
¬ (Rn8 of @ERd) → Z ⎯ ⎯ ⎯ ⎯ ⎯ 6
¬ (Rn8 of @aa:8) → Z ⎯ ⎯ ⎯ ⎯ ⎯ 6
(#xx:3 of Rd8) → C
⎯⎯⎯⎯⎯
2