HD6413007F20 Datasheet, PDF (112/798 Pages) Renesas Technology Corp – Hardware Manual Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Series

5. Interrupt Controller
5.2 Register Descriptions
5.2.1 System Control Register (SYSCR)
SYSCR is an 8-bit readable/writable register that controls software standby mode, selects the
action of the UI bit in CCR, selects the NMI edge, and enables or disables the on-chip RAM.
Only bits 3 and 2 are described here. For the other bits, see section 3.3, System Control Register
(SYSCR).
SYSCR is initialized to H'09 by a reset and in hardware standby mode. It is not initialized in
software standby mode.
Bit
Initial value
Read/Write
7
SSBY
0
R/W
6
STS2
0
R/W
5
STS1
0
R/W
4
STS0
0
R/W
3
2
1
0
UE NMIEG SSOE RAME
1
0
0
1
R/W
R/W
R/W
R/W
RAM enable
Software standby
output port enable
Standby timer
select 2 to 0
NMI edge select
Selects the NMI input edge
Software standby
User bit enable
Selects whether to use the UI bit in
CCR as a user bit or interrupt mask bit
Bit 3⎯User Bit Enable (UE): Selects whether to use the UI bit in CCR as a user bit or an
interrupt mask bit.
Bit 3
UE
0
1
Description
UI bit in CCR is used as interrupt mask bit
UI bit in CCR is used as user bit
(Initial value)
Rev.5.00 Sep. 12, 2007 Page 82 of 764
REJ09B0396-0500