HD6413007F20 Datasheet, PDF (222/798 Pages) Renesas Technology Corp – Hardware Manual Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Series

7. DMA Controller
7.2.1 Memory Address Registers (MAR)
A memory address register (MAR) is a 32-bit readable/writable register that specifies a source or
destination address. The transfer direction is determined automatically from the activation source.
An MAR consists of four 8-bit registers designated MARR, MARE, MARH, and MARL. All bits
of MARR are reserved; they cannot be modified and are always read as 1.
Bit
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Initial value 1 1 1 1 1 1 1 1
Undetermined
Read/Write ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
MARR
MARE
MARH
MARL
Source or destination address
An MAR functions as a source or destination address register depending on how the DMAC is
activated: as a destination address register if activation is by a receive-data-full interrupt from the
serial communication interface (SCI) (channel 0) or by a conversion-end interrupt from the A/D
converter, and as a source address register otherwise.
The MAR value is incremented or decremented each time one byte or word is transferred,
automatically updating the source or destination memory address. For details, see section 7.3.4,
Data Transfer Control Registers (DTCR).
The MARs are not initialized by a reset or in standby mode.
7.2.2 I/O Address Registers (IOAR)
An I/O address register (IOAR) is an 8-bit readable/writable register that specifies a source or
destination address. The IOAR value is the lower 8 bits of the address. The upper 16 address bits
are all 1 (H'FFFF).
Bit
7
6
5
4
3
2
1
0
Initial value
Read/Write
Undetermined
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Source or destination address
An IOAR functions as a source or destination address register depending on how the DMAC is
activated: as a source address register if activation is by a receive-data-full interrupt from the SCI
Rev.5.00 Sep. 12, 2007 Page 192 of 764
REJ09B0396-0500