HD6413007F20 Datasheet, PDF (409/798 Pages) Renesas Technology Corp – Hardware Manual Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Series

10. 8-Bit Timers
10.7.2 Contention between 8TCNT Write and Increment
If an increment pulse occurs in the T₃ state of a 8TCNT write cycle, writing takes priority and
8TCNT is not incremented. Figure 10.19 shows the timing in this case.
8TCNT write cycle
T1
T2
T3
φ
Address bus
8TCNT address
Internal write signal
8TCNT input clock
8TCNT
N
M
8TCNT write data
Figure 10.19 Contention between 8TCNT Write and Increment
Rev.5.00 Sep. 12, 2007 Page 379 of 764
REJ09B0396-0500