HD6413007F20 Datasheet, PDF (581/798 Pages) Renesas Technology Corp – Hardware Manual Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Series

18. Clock Pulse Generator
Table 18.3 Clock Timing
V = 2.7 V V = 3.0 V V = 5.0 V
CC
CC
CC
to 5.5 V
to 5.5 V
±10%
Item
Symbol Min Max Min Max Min Max
External clock input t_EXL
low pulse width
40 ⎯ 30 ⎯ 15 ⎯
External clock input t_EXH
high pulse width
40 ⎯ 30 ⎯ 15 ⎯
External clock rise t
EXr
time
⎯ 10 ⎯ 8
⎯5
External clock fall t
EXf
time
⎯ 10 ⎯ 8
⎯5
Clock low pulse t_CL
width
0.4 0.6 0.4 0.6 0.4 0.6
80 ⎯ 80 ⎯ 80 ⎯
Clock high pulse t_CH
width
0.4 0.6 0.4 0.6 0.4 0.6
80 ⎯ 80 ⎯ 80 ⎯
External clock
output settling
delay time
t_DEXT*
500 ⎯
500 ⎯
500 ⎯
Note: * t_DEXT includes a 10 t_cyc of RES pulse width (t_RESW).
Unit Test Conditions
ns Figure 18.6
ns
ns
ns
t_cyc φ ≥ 5 MHz Figure
ns φ < 5 MHz ^20.3
t_cyc φ ≥ 5 MHz
ns φ < 5 MHz
µs Figure 18.7
EXTAL
t_EXH
t_EXL
V_CC × 0.7
0.3 V
t_EXr
t_EXf
Figure 18.6 External Clock Input Timing
V_CC × 0.5
Rev.5.00 Sep. 12, 2007 Page 551 of 764
REJ09B0396-0500