HD6413007F20 Datasheet, PDF (613/798 Pages) Renesas Technology Corp – Hardware Manual Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Series

20. Electrical Characteristics
Condition A
Item
Symbol Min Max
Write data setup t
WDS1
time 1
1.0 t ⎯
cyc
– 50
Write data setup t_WDS2
time 2
2.0 t_cyc ⎯
– 50
Write data hold t_WDH
time
0.5 t_cyc ⎯
– 30
Read data
t
⎯
ACC1
access time 1
2.0 t
cyc
– 100
Read data
t_ACC2
⎯
access time 2
3.0 t_cyc
– 100
Read data
t
⎯
ACC3
access time 3
1.5 t
cyc
– 100
Read data
t_ACC4
⎯
access time 4
2.5 t_cyc
– 100
Precharge time 1 t_PCH1
1.0 t_cyc ⎯
– 40
Precharge time 2 t
PCH2
0.5 t ⎯
cyc
– 40
Wait setup time t_WTS
40
⎯
Wait hold time t_WTH
5
⎯
Bus request
t
40
⎯
BRQS
setup time
Bus acknowledge t_BACD1
⎯
60
delay time 1
Bus acknowledge t_BACD2
⎯
60
delay time 2
Bus-floating time t
BZD
RAS precharge t
RP
time
CAS precharge t_CP
time
⎯
60
1.5 t ⎯
cyc
– 50
0.5 t_cyc ⎯
– 30
Low address hold t
RAH
time
RAS delay time 1 t_RAD1
RAS delay time 2 t_RAD2
0.5 t ⎯
cyc
– 30
⎯
60
⎯
60
Condition B
Min Max
1.0 t ⎯
cyc
– 40
2.0 t_cyc ⎯
– 40
0.5 t_cyc ⎯
– 25
⎯
2.0 t
cyc
– 80
⎯
3.0 t_cyc
– 80
⎯
1.5 t
cyc
– 80
⎯
2.5 t_cyc
– 80
1.0 t_cyc ⎯
– 30
0.5 t ⎯
cyc
– 30
40
⎯
5
⎯
40
⎯
⎯
50
⎯
50
⎯
50
1.5 t ⎯
cyc
– 40
0.5 t_cyc ⎯
– 25
0.5 t ⎯
cyc
– 25
⎯
50
⎯
50
Condition C
Test
Min Max Unit Conditions
1.0 t ⎯
cyc
– 30
2.0 t_cyc ⎯
– 30
ns Figure 20.8,
figure 20.9,
ns ^{figure 20.11,}
figure 20.12
0.5 t_cyc ⎯
ns
– 15
⎯
2.0 t ns
cyc
– 45
⎯
3.0 t_cyc ns
– 45
⎯
1.5 t ns
cyc
– 45
⎯
2.5 t_cyc ns
– 45
1.0 t_cyc ⎯
ns
– 20
0.5 t ⎯ ns
cyc
– 20
25
⎯ ns Figure 20.10
5
⎯ ns
25
⎯ ns Figure 20.13
⎯
30 ns
⎯
30 ns
⎯
30
1.5 t ⎯
cyc
– 25
0.5 t_cyc ⎯
– 15
0.5 t ⎯
cyc
– 15
⎯
25
⎯
30
ns
ns Figure 20.14
to
ns ^{figure 20.16}
ns
ns
ns
Rev.5.00 Sep. 12, 2007 Page 583 of 764
REJ09B0396-0500