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HD6413007F20 Datasheet, PDF (481/798 Pages) Renesas Technology Corp – Hardware Manual Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Series | |||
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13. Serial Communication Interface
The BRR setting is calculated as follows:
Asynchronous mode:
Ï
N=
64 Ã 22n-1 Ã B
Synchronous mode:
à 106 â 1
Ï
N=
8 Ã 22n-1 Ã B
à 106 â 1
Legend:
B: Bit rate (bit/s)
N: BRR setting for baud rate generator (0 ⤠N ⤠255)
Ï: System clock frequency (MHz)
n: Baud rate generator clock source (n = 0, 1, 2, 3)
(For the clock sources and values of n, see the following table.)
SMR Settings
n
Clock Source
CKS1
CKS0
0
Ï
0
0
1
Ï/4
0
1
2
Ï/16
1
0
3
Ï/64
1
1
The bit rate error in asynchronous mode is calculated as follows:
Error (%) =
Ï Ã 106
â 1 Ã 100
(N + 1) Ã B Ã 64 Ã 22n-1
Rev.5.00 Sep. 12, 2007 Page 451 of 764
REJ09B0396-0500
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