HD6413007F20 Datasheet, PDF (122/798 Pages) Renesas Technology Corp – Hardware Manual Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Series

5. Interrupt Controller
5.3 Interrupt Sources
The interrupt sources include external interrupts (NMI, IRQ₀ to IRQ₅) and 36 internal interrupts.
5.3.1 External Interrupts
There are seven external interrupts: NMI, and IRQ₀ to IRQ₅. Of these, NMI, IRQ₀, IRQ₁, and
IRQ₂ can be used to exit software standby mode.
NMI: NMI is the highest-priority interrupt and is always accepted, regardless of the states of the I
and UI bits in CCR. The NMIEG bit in SYSCR selects whether an interrupt is requested by the
rising or falling edge of the input at the NMI pin. NMI interrupt exception handling has vector
number 7.
IRQ₀
to
IRQ₅
Interrupts:
These
interrupts
are
requested
by
input
signals
at
pins
IRQ
0
to
IRQ₅.
The IRQ₀ to IRQ₅ interrupts have the following features.
• ISCR settings can select whether an interrupt is requested by the low level of the input at pins
IRQ
0
to
IRQ₅,
or
by
the
falling
edge.
• IER settings can enable or disable the IRQ₀ to IRQ₅ interrupts. Interrupt priority levels can be
assigned by four bits in IPRA (IPRA7 to IPRA4).
• The status of IRQ₀ to IRQ₅ interrupt requests is indicated in ISR. The ISR flags can be cleared
to 0 by software.
Figure 5.2 shows a block diagram of interrupts IRQ₀ to IRQ₅.
IRQnSC
IRQnE
IRQn input
Edge/level
sense circuit
IRQnF
S
Q
R
IRQn interrupt
request
Clear signal
Note: n = 5 to 0
Figure 5.2 Block Diagram of Interrupts IRQ₀ to IRQ₅
Rev.5.00 Sep. 12, 2007 Page 92 of 764
REJ09B0396-0500