HD6413007F20 Datasheet, PDF (715/798 Pages) Renesas Technology Corp – Hardware Manual Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Series

Appendix B Internal I/O Registers
TIOR0⎯Timer I/O Control Register 0
H'FFF69
16-Bit Timer Channel 0
Bit 7
6
5
4
3
2
1
0
⎯ IOB2 IOB1 IOB0 ⎯ IOA2 IOA1 IOA0
Initial value 1
0
0
0
1
0
0
0
Read/Write ⎯ R/W R/W R/W ⎯ R/W R/W R/W
I/O control A2 to A0
Bit 2
IOA2
Bit 1
IOA1
0
0
1
0
1
1
Bit 0
IOA0
0
1
0
1
0
1
0
1
Description
GRA is output
compare register
Pin output at compare match disabled
0 output at GRA compare match
1 output at GRA compare match
Toggle output at GRA compare match
(1 output on channel 2 only)
(Initial value)
GRA is input
capture register
Input capture in GRA at rising edge
Input capture in GRA at falling edge
Input capture at both rising and falling edges
I/O control B2 to B0
Bit 6
IOB2
Bit 5
IOB1
0
0
1
0
1
1
Bit 4
IOB0
0
1
0
1
0
1
0
1
Description
GRB is output Pin output at compare match disabled (Initial value)
compare register _{0 output at GRB compare match}
1 output at GRB compare match
Toggle output at GRB compare match
(1 output on channel 2 only)
GRB is input
Input capture in GRB at rising edge
capture register Input capture in GRB at falling edge
Input capture at both rising and falling edges
16TCNT0H/L⎯Timer Counter 0H/L
H'FFF6A
H'FFF6B
16-Bit Timer Channel 0
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Initial value 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Read/Write R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
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